january 2014 FDD1600N10ALZ ? n-channel powertrench ? mosfet ?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 1 FDD1600N10ALZ n-channel powertrench ? mosfet ? 100 v, 6.8 a, 160 m ? features ?r ds(on) = 124 m ? (typ.) @ v gs = 10 v, i d = 3.4 a ?r ds(on) = 175 m ? (typ.) @ v gs = 5 v, i d = 2.1 a ? low gate charge (typ.2.78 nc) ?low c rss (typ. 2.04 pf) ? fast switching ? 100% avalanche tested ? improved dv/dt capability ?rohs compliant description this n-channel mosfet is pr oduced using fairchld semicon- ductor?s advanced powertrench ? process that has been tai- lored to minimize the on-state resistance and maintain superior switching performance. application ? consumer appliances ? led tv and monitor ? synchronous rectification ? uninterruptible power supply ? micro solar inverter d-pak g s d g d s mosfet maximum ratings t c = 25 o c unless otherwise noted. thermal characteristics symbol parameter FDD1600N10ALZ unit v dss drain to source voltage 100 v v gss gate to source voltage 20 v i d drain current - continuous (t c = 25 o c) 6.8 a - continuous (t c = 100 o c) 4.3 i dm drain current - pulsed (note 1) 13.6 a e as single pulsed avalanche energy (note 2) 5.08 mj dv/dt peak diode recovery dv/dt (note 3) 6.0 v/ns p d power dissipation (t c = 25 o c) 14.9 w - derate above 25 o c0.12w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for solderi ng, 1/8? from case for 5 seconds 300 o c symbol parameter FDD1600N10ALZ unit r ? jc thermal resistance, junction to case, max. 8.4 o c/w r ? ja thermal resistance, junction to ambient, max. 87
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 2 FDD1600N10ALZ ? n-channel powertrench ? mosfet package marking and ordering information electrical characteristics t c = 25 o c unless otherwise noted. off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics part number top mark package packing method reel size tape width quantity FDD1600N10ALZ 1600n10alz dpak tape and reel 330 mm 16 mm 2500 units symbol parameter test conditions min. typ. max. unit bv dss drain to source breakdown voltage i d = 250 ? a, v gs = 0 v 100 - - v ? bv dss / ? t j breakdown voltage temperature coefficient i d = 250 ? a, referenced to 25 o c-0.1-v/ o c i dss zero gate voltage drain current v ds = 80 v, v gs = 0 v - - 1 ? a v ds = 80 v, v gs = 0 v, t c = 125 o c - - 500 i gss gate to source leakage current v gs = 20 v, v ds = 0 v - - 10 ? a v gs(th) gate threshold voltage v gs = v ds , i d = 250 ?? a1.4-2.8v r ds(on) static drain to source on resistance v gs = 10 v, i d = 3.4 a - 124 160 m ? v gs = 5 v, i d = 2.1 a - 175 375 g fs forward transconductance v ds = 10 v, i d = 6.8 a - 19.6 - s c iss input capacitance v ds = 50 v, v gs = 0 v, f = 1 mhz - 169 225 pf c oss output capacitance - 43 55 pf c rss reverse transfer capacitance - 2.04 - pf c oss(er) energy related output capacitance v ds = 50 v, v gs = 0 v 85 - pf q g(tot) total gate charge at 10v v gs = 10 v v dd = 50 v, i d = 6.8 a (note 4) -2.783.61nc q g(tot) total gate charge at 5v v gs = 5 v 1.5 1.95 nc q gs gate to source gate charge - 0.72 - nc q gd gate to drain ?miller? charge - 0.56 - nc v plateau gate plateau volatge - 4.02 - v q sync total gate charge sync. v ds = 0 v, i d = 3.4 a - 2.5 - nc q oss output charge v ds = 50 v, v gs = 0 v - 5.2 - nc esr equivalent series resistance (g-s) f = 1 mhz - 2.1 - ? t d(on) turn-on delay time v dd = 50 v, i d = 6.8 a, v gs = 10 v, r g = 4.7 ? (note 4) - 7 24 ns t r turn-on rise time - 2 14 ns t d(off) turn-off delay time - 13 36 ns t f turn-off fall time - 2 14 ns i s maximum continuous drain to source diode forward current - - 6.8 a i sm maximum pulsed drain to source diode forward current - - 13.6 a v sd drain to source diode forward voltage v gs = 0 v, i sd = 6.8 a - - 1.3 v t rr reverse recovery time v gs = 0 v, i sd = 6.8 a, v ds = 50 v, di f /dt = 100 a/ ? s -37-ns q rr reverse recovery charge - 42 - nc notes: 1. repetitive rating: pulse-width limited by maximum junction temperature. 2. l = 1 mh, i as =3.18 a, r g = 25 ? , starting t j = 25 ? c. 3. i sd ?? 6.8 a, di/dt ? 200 a/ ? s, v dd ? bv dss , starting t j = 25 ? c. 4. essentially independent of operating temperature typical characteristics.
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 3 FDD1600N10ALZ ? n-channel powertrench ? mosfet typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.3 1 5 0.3 1 10 *notes: 1. 250 ? s pulse test 2. t c = 25 o c i d , drain current[a] v ds , drain-source voltage[v] v gs = 15.0v 10.0v 8.0v 6.0v 5.0v 4.5v 4.0v 3.5v 123456 0.1 1 10 -55 o c 150 o c *notes: 1. v ds = 10v 2. 250 ? s pulse test 25 o c i d , drain current[a] v gs , gate-source voltage[v] 0 5 10 15 20 0 100 200 300 400 *note: t c = 25 o c v gs = 10v v gs = 5v r ds(on) [m ? ], drain-source on-resistance i d , drain current [a] 0.3 0.6 0.9 1.2 1.5 1 10 30 *notes: 1. v gs = 0v 2. 250 ? s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 0.1 1 10 100 1 10 100 300 c oss c iss c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v] 0 0.5 1.0 1.5 2.0 2.5 3.0 0 2 4 6 8 *note: i d = 3.4a v ds = 20v v ds = 50v v ds = 80v v gs , gate-source voltage [v] q g , total gate charge [nc]
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 4 FDD1600N10ALZ ? n-channel powertrench ? mosfet typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum drain current vs. case temp erature figure 11. eoss vs. drain to source voltage figure 12. unclamped inductive switching cap ability -80 -40 0 40 80 120 160 0.4 0.8 1.2 1.6 2.0 2.4 *notes: 1. v gs = 10v 2. i d = 3.4a r ds(on) , [normalized] drain-source on-resistance t j , junction temperature [ o c] -80 -40 0 40 80 120 160 0.90 0.95 1.00 1.05 1.10 *notes: 1. v gs = 0v 2. i d = 250 ? a bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c] 25 50 75 100 125 150 0 2 4 6 8 v gs = 5v r ? jc = 8.4 o c/w v gs = 10v i d , drain current [a] t c , case temperature [ o c] 1 10 100 200 0.01 0.1 1 10 30 single pulse t c = 25 o c t j = 150 o c r ? jc = 8.4 o c/w 100ms 100us 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) dc 0 20406080100 0 0.05 0.10 0.15 0.20 0.25 e oss [ ? j] v ds , drain to source voltage [v] 0.001 0.01 0.1 1 1 2 3 4 5 6 7 8 t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a)
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 5 FDD1600N10ALZ ? n-channel powertrench ? mosfet typical performance characteristics (continued) figure 13 . transient thermal response curve 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 0.1 1 10 20 0.01 0.1 0.2 0.05 0.02 *notes: 1. z ? jc (t) = 8.4 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) 0.5 single pulse thermal response [z ? jc ] t1, rectangular pulse duration [sec] t 1 p dm t 2 z ? jc (t), thermal response [ o c/w] t 1 , rectangular pulse dura tion [sec]
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 6 FDD1600N10ALZ ? n-channel powertrench ? mosfet figure 14. gate charge test circuit & waveform figure 15. resistive switch ing test circuit & waveforms figure 16. unclamped inductive switching test circuit & waveforms v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v gs i g = const.
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 7 FDD1600N10ALZ ? n-channel powertrench ? mosfet figure 17. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 8 FDD1600N10ALZ ? n-channel powertrench ? mosfet figure 18. total gate charge qsync. test circuit & waveforms v gs (d u t) v gs (driver) driver r g v cc du t v r v dd ?? 1 g r g qsync v t dt r ?? ? g 10v t t v gs
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 9 FDD1600N10ALZ ? n-channel powertrench ? mosfet mechanical dimensions figure 19. to252 (d-pak), mo lded, 3-lead, option aa&ab package drawings are provided as a service to customers considering fairchild com ponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/packagedetails.html?id=pn_tt252-003
?2012 fairchild semiconductor corporation FDD1600N10ALZ rev. c3 www.fairchildsemi.com 10 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or desi gn. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditio ns, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support de vices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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FDD1600N10ALZ ? n-channel powertrench ? mosfet
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